Capital Logic Aero teaches you how to create projects, create and maintain design and diagram structure, create shared objects, set object naming preferences,
set option definitions, create revisions and build lists, create functional diagrams, handle shared objects in and across diagrams, place conductors,
assign options and library parts, compare designs, create library components, report on designs created.
has a masters degree in electrical engineering. From 1991 until the end of 2001, he worked as an ASIC design engineer at Philips Kommunikationsindustrie and Lucent Technologies in Nuremberg and at Infineon Technologies in San Jose, CA, USA. He worked on the creation of specifications, the implementation in VHDL, verification on module and chip level as well as programming of ASIC Driver Software in C.
Mr. Schwender has been working at TRIAS mikroelektronik GmbH since 2002 and, as the technical manager covers a large part of Siemens EDA's products - with a focus on HDL design, verification and cable harness design products.
Requirements: Beginners level, no prerequisites needed I Duration: 2 Days I Language: English / optional German I Price: Upon request