TRAINING

Capital Logic Designer-Aero

Description

The Capital Logic Designer - Aero course introduces users to the basic and more complex functionality within the Capital Logic Designer product for aero customers. In this course, you will learn how to create projects, create and maintain design and diagram structure, create Shared objects, set object naming preferences, set option definitions, create revisions and build lists, create Functional Diagrams, handle shared objects in and across diagrams, place conductors, assign options and library parts, compare designs, create library components, and report on designs created.


THE TRAINER

Hans-Jürgen Schwender

has a masters degree in electrical engineering. From 1991 until the end of 2001, he worked as an ASIC design engineer at Philips Kommunikationsindustrie and Lucent Technologies in Nuremberg and at Infineon Technologies in San Jose, CA, USA. He worked on the creation of specifications, the implementation in VHDL, verification on module and chip level as well as programming of ASIC Driver Software in C.

Mr. Schwender has been working at TRIAS mikroelektronik GmbH since 2002 and, as the technical manager covers a large part of Siemens EDA's products - with a focus on HDL design, verification and cable harness design products.


Requirements: Familiarity with concepts of creating schematics or wiring diagrams I Duration: 2,5 Days I Language: English / optional German I Price: Upon request

Dates

  • Dates upon request

We are happy to offer further options such as live online sessions and on-site training upon request.

Course request

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