FPGA Verification Day 2020 - 1 October 2020
We have been closely monitoring how the COVID-19 situation is developing and how it can affect our event.
For your safety, the FPGA Verification Day will take place virtually online this year. So put the date in your diary right now.
More information to follow
Everybody is talking about it and many companies are jumping on the functional safety train. The latest industry study from the Wilson Research Group shows, that almost 2/3 of today’s European FPGA design projects are used within a safety application, for example autonomous driving or airplanes.
Such safety applications require a high quality and a high reliability of the FPGAs.
But what is Functional Safety? Functional Safety is driving down the risk of Electrical and Electronics malfunctioning due to failures during operation. Standards like the ISO 26262 or the IEC 61508 focus on two areas of faults: Systematic Faults (try to make sure that your design or a part of your design or the functionality of your design does work correctly according to the specification) and Random HW Faults (EMI or Electro-migration can change the HW behavior). Functional fault testing discovers whether the actual operating behavior of the design under fault conditions is acceptable.
In this one day event, FPGA experts will talk about the functional safety development process with focus on Systematic Faults. Our experts will also be available for your individual questions during an open Q & A Session – and the day ends with a lucky draw and the chance get your hand on an exciting prize (no it’s not a free Questa license :)).
As some of the experts are not familiar with the German language (especially our Bavarian friend Stefan), presentations will be held in English.
Participation is of course free of charge.
26 September 2019 | Berlin | Germany
Select Hotel Berlin Spiegelturm
Ask the Experts followed by Prize Draw
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